Example embodiments of the inventive concepts relate to memory systems. For example, at least some example embodiments relate to a memory system selectively performing a training operation in order to compensate for different timing skews and align data signals, thereby maintaining an optimal (or desired) reliability of the data signals.
A semiconductor memory device may be embodied using a semiconductor such as silicon Si, germanium Ge, gallium arsenide GaAs, indium phosphide InP, etc. A semiconductor memory device may be classified as a volatile memory device or a nonvolatile memory device.
A volatile memory device may lose its stored data when a power supply is interrupted. Examples of the volatile memory device are a static RAM (SRAM), a dynamic RAM (DRAM), a synchronous DRAM, etc. A nonvolatile memory device may retain its stored data even when a power supply is interrupted. Examples of the nonvolatile memory device are a read only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable and programmable ROM (EEPROM), a flash memory device, a phase change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), a ferroelectric RAM (FRAM), etc.
A semiconductor memory device may exchange data signals DQ with a memory controller. The data signals DQ may have different timing skews due to a variation of PVT (process, voltage, temperature) and an environment difference of a channel. Thus, performing a training operation with respect to the data signals DQ may be desirable in order to compensate for the different timing skews and align the data signals DQ, thereby maintaining an optimal (or desired) reliability of the data signals DQ. However, performing a rooted (full) training operation of searching all bits of a training code with respect to the data signals DQ may take a great deal of time.